展期论坛 | CPO与硅光驱动 AI Factory 新基建论坛，议程及嘉宾阵容抢先看

AI算力需求爆发，电互连的功耗与带宽瓶颈使光电融合成为必然。演讲梳理从可插拔、LPO、NPO到CPO的演进路径，剖析光引擎如何逐步靠近交换芯片以大幅降低互连功耗，并对比各方案的落地节奏。重点阐述两条主线：一是先进封装路线，从2.5D迈向3D堆叠与混合键合，实现光电芯片的异质集成；二是Foundry–Fabless分工，以标准化PDK串联EDA设计、晶圆制造与封装测试，让光电芯片可设计、可验证、可量产。最后探讨良率、测试与光纤耦合等产业化挑战，展望未来机会。

As AI compute demand surges, the power and bandwidth limits of electrical interconnects are making photonic-electronic convergence inevitable. This talk traces the evolution from pluggable optics through LPO and NPO to CPO, examining how the optical engine moves progressively closer to the switch chip to sharply reduce interconnect power, and comparing the deployment pace of each approach. It focuses on two main threads. The first is the advanced packaging roadmap, moving from 2.5D to 3D stacking and hybrid bonding to achieve heterogeneous integration of photonic and electronic chips. The second is the foundry–fabless model, in which standardized PDKs link EDA design, wafer fabrication, and packaging and test, making photonic-electronic chips designable, verifiable, and manufacturable at volume. The talk closes with the industrialization challenges of yield, test, and fiber coupling, and an outlook on the opportunities ahead.

本报告提出一种基于并行矩阵MicroLED技术的下一代超高密度光互连SoC芯片解决方案，聚焦大算力场景下短距数据传输的核心痛点，致力于重构数据中心短距互连技术范式。该方案针对性面向人工智能大算力应用场景，适配HBM、XPU核心器件的短距光互连需求，依托并行矩阵MicroLED的技术特性，突破传统电互连及常规光互连在传输密度、功耗控制上的技术瓶颈。通过芯片架构与光互连链路的一体化优化设计，该方案可实现数据传输的低功耗、高密度、高效率落地，为AI算力集群的海量数据高速交互提供全新技术路径，能够有效解决大算力时代短距互连带宽不足、功耗偏高、集成度受限等关键问题，为数据中心算力升级、AI硬件架构优化提供核心技术支撑，具备广阔的产业化应用前景与行业革新价值。

This report presents a next-generation ultra-high-density optical interconnect SoC chip solution based on parallel matrix MicroLED technology. Focusing on the core pain points of short-reach data transmission in high-computing scenarios, it aims to reshape the paradigm of short-reach interconnection in data centers. Targeting AI high-computing applications, the solution meets the short-reach optical interconnection requirements of core devices including HBM and XPU. Leveraging the technical characteristics of parallel matrix MicroLED, it breaks through the bottlenecks of traditional electrical interconnection and conventional optical interconnection in terms of transmission density and power consumption control. Through integrated optimization of chip architecture and optical interconnect links, the solution enables low-power, high-density and high-efficiency data transmission. It offers a new technical route for high-speed mass data exchange in AI computing clusters, effectively addressing key challenges in the high-computing era such as insufficient bandwidth, excessive power consumption and limited integration for short-reach interconnection. It provides core technical support for data center computing power upgrade and AI hardware architecture optimization, with broad industrialization prospects and transformative industry value.

本报告将围绕 CW与硅光芯片、器件及模块的智能制造关键技术，重点介绍光芯片全自动排 Bar与拆Bar、多面外观AOI检测、贴片及耦合前物料转料、光器件固晶与共晶，以及光模块自动化组装线等关键工艺与设备解决方案，探讨光通信产业链智能制造的发展趋势。

This report centers on key intelligent manufacturing technologies of CW and silicon photonic chips, devices and modules. It introduces core processes & equipment:  Bar Stacking/Bar Unstacking, multi-surface AOI, pre-die-attach & pre-coupling material  handling, die bonding/eutectic bonding, and  automatic optical module assembly lines. Through these solutions, the report aims to discuss with industry peers the intelligent manufacturing trends across the optical communication industry chain.

AI 算力爆发驱动光互连成为基础设施核心底座。本次分享围绕支撑 AI 基础设施的光技术，梳理技术演进脉络，剖析从硅光、高速光模块到片上光互联的技术迭代逻辑。结合国内外产业落地实践，拆解当前技术瓶颈、供应链痛点与规模化应用挑战，探讨光技术如何破解 AI 集群带宽、功耗难题。同时结合产业链上下游协同趋势，展望面向下一代大模型算力网络的光技术路线与商业化机遇。

在摩尔定律逼近物理极限的背景下，先进封装技术成为延续芯片性能提升的核心路径。当前，技术创新聚焦于三维集成（3D/2.5D封装）、Chiplet异构集成及系统级封装（SiP），通过TSV（硅通孔）、FC、Bumping、RDL（再布线）等技术实现更高密度互连与算力突破。

华天科技 Hmatrix先进封装平台将为您提供多元化的先进封装解决方案。

Against the backdrop of Moore's Law approaching its physical limits, advanced packaging has emerged as the core path to continuing chip performance improvements.Currently, technological innovation is focused on 3D/2.5D , Chiplet , and SiP, leveraging technologies such as TSV, FC, Bumping and RDL to achieve higher-density interconnect and greater computing power breakthrough.

Huatian Technology’s Hmatrix AD PKG platform will provide you with diversified AD PKG solutions.

本报告围绕面向 AI 的集成光子计算展开。首先分析 AI 算力需求增长下，电子硬件在单芯片算力、数据搬移、多卡互连和系统能耗方面面临的瓶颈，并引出集成光子计算在高带宽、低延迟、并行处理和能效上的潜力。随后梳理相干干涉、强度加权、衍射计算、复合架构和光神经形态等主流路线，指出其从功能验证走向实际部署仍面临光电接口、系统协同和工具链挑战。最后重点介绍 SiPh IC-TROSA、Coherent-Lightning 和 LightIN 三项工作，展示从高性能光计算核到光电协同系统，再到面向 AI 集群的可重构光子平台的发展路径。