报告来源:Hou, Yubo, Sezin Kircali Ata, Gen Liang Lim, Richard Chang, Mihai Dragos Rotaru, Rahul Dutta, and Ashish James. “FAPlace: Joint Optimization of Chiplet Placement and Interposer Footprint for 2.5 D Systems.” In Proceedings of the Great Lakes Symposium on VLSI 2026, pp. 942-947. 2026